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| author |   Matthew Brost <matthew.brost@intel.com> | 2022-01-20 20:31:18 -0800 |
|---|---|---|
| committer |   John Harrison <John.C.Harrison@Intel.com> | 2022-01-21 15:46:44 -0800 |
| commit | 5fe0fdd23e3379833f4346b49fa791733c22ed29 (patch) | |
| tree | ad028afad0fdae285ee316dddb12bee6e78ee97f /drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | |
| parent | drm/i915/guc: Add work queue to trigger a GT reset (diff) | |
| download | linux-dev-5fe0fdd23e3379833f4346b49fa791733c22ed29.tar.xz linux-dev-5fe0fdd23e3379833f4346b49fa791733c22ed29.zip | |
drm/i915/guc: Flush G2H handler during a GT reset
Now that the error capture is fully decoupled from fence signalling
(request retirement to free memory, which in turn depends on resets) we
can safely flush the G2H handler during a GT reset. This eliminates
corner cases where GuC generated G2H (e.g. engine resets) race with a GT
reset.
v2:
(John Harrison)
- Fix typo in commit message (s/is/in)
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220121043118.24886-4-matthew.brost@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c')
0 files changed, 0 insertions, 0 deletions