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| author |   Chris Wilson <chris@chris-wilson.co.uk> | 2020-05-11 15:13:03 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2020-05-11 16:50:04 +0100 |
| commit | 9bad40a27dac1f88012a1e2db0bfc5ae58fa0370 (patch) | |
| tree | 85efc748a41c4c4d25d36d18e296d9ca944342af /drivers/gpu/drm/i915/gem/i915_gem_pages.c | |
| parent | drm/i915: Emit await(batch) before MI_BB_START (diff) | |
| download | linux-dev-9bad40a27dac1f88012a1e2db0bfc5ae58fa0370.tar.xz linux-dev-9bad40a27dac1f88012a1e2db0bfc5ae58fa0370.zip | |
drm/i915/selftests: Always flush before unpining after writing
Be consistent, and even when we know we had used a WC, flush the mapped
object after writing into it. The flush understands the mapping type and
will only clflush if !I915_MAP_WC, but will always insert a wmb [sfence]
so that we can be sure that all writes are visible.
v2: Add the unconditional wmb so we are know that we always flush the
writes to memory/HW at that point.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200511141304.599-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gem/i915_gem_pages.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gem/i915_gem_pages.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c index 5d855fcd5c0f..af9e48ee4a33 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c @@ -391,6 +391,7 @@ void __i915_gem_object_flush_map(struct drm_i915_gem_object *obj, GEM_BUG_ON(range_overflows_t(typeof(obj->base.size), offset, size, obj->base.size)); + wmb(); /* let all previous writes be visible to coherent partners */ obj->mm.dirty = true; if (obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE) |