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| author |   Jani Nikula <jani.nikula@intel.com> | 2022-02-08 17:23:17 +0200 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2022-02-11 11:35:37 +0200 |
| commit | 420f63cb6d2a691b94662f50e07dc3c9a851bc69 (patch) | |
| tree | 6e88069d8e00e586be5695875872c02a2a297758 /drivers/gpu/drm/i915/gt/gen6_ppgtt.c | |
| parent | drm/i915/dp: add 128b/132b support to link status checks (diff) | |
| download | linux-dev-420f63cb6d2a691b94662f50e07dc3c9a851bc69.tar.xz linux-dev-420f63cb6d2a691b94662f50e07dc3c9a851bc69.zip | |
drm/i915/mst: update slot information for 128b/132b
128b/132b supports using 64 slots starting from 0, while 8b/10b reserves
slot 0 for metadata.
Commit d6c6a76f80a1 ("drm: Update MST First Link Slot Information Based
on Encoding Format") added support for updating the topology state
accordingly, and commit 41724ea273cd ("drm/amd/display: Add DP 2.0 MST
DM Support") started using it in the amd driver.
This feels more than a little cumbersome, especially updating the
information in atomic check. For i915, add the update to MST connector
.compute_config hook rather than iterating over all MST managers and
connectors in global mode config .atomic_check. Fingers crossed.
v3:
- Propagate errors from intel_dp_mst_update_slots() (Ville)
v2:
- Update in .compute_config() not .atomic_check (Ville)
Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220208152317.3019070-1-jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/gen6_ppgtt.c')
0 files changed, 0 insertions, 0 deletions