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author | Chris Wilson <chris@chris-wilson.co.uk> | 2019-10-21 18:43:39 +0100 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-10-21 21:01:52 +0100 |
commit | b5e8e954eb672e7128e50589c43817b0ffce6f75 (patch) | |
tree | 704bd8df9a1f494b271d7d51e6143bbc7de57338 /drivers/gpu/drm/i915/gt/intel_engine_pm.c | |
parent | drm/i915/selftests: Use all physical engines for i915_active (diff) | |
download | linux-dev-b5e8e954eb672e7128e50589c43817b0ffce6f75.tar.xz linux-dev-b5e8e954eb672e7128e50589c43817b0ffce6f75.zip |
drm/i915/gt: Introduce barrier pulses along engines
To flush idle barriers, and even inflight requests, we want to send a
preemptive 'pulse' along an engine. We use a no-op request along the
pinned kernel_context at high priority so that it should run or else
kick off the stuck requests. We can use this to ensure idle barriers are
immediately flushed, as part of a context cancellation mechanism, or as
part of a heartbeat mechanism to detect and reset a stuck GPU.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191021174339.5389-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_engine_pm.c')
-rw-r--r-- | drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c index 67eb6183648a..7d76611d9df1 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c @@ -111,7 +111,7 @@ static bool switch_to_kernel_context(struct intel_engine_cs *engine) i915_request_add_active_barriers(rq); /* Install ourselves as a preemption barrier */ - rq->sched.attr.priority = I915_PRIORITY_UNPREEMPTABLE; + rq->sched.attr.priority = I915_PRIORITY_BARRIER; __i915_request_commit(rq); /* Release our exclusive hold on the engine */ |