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author | Chris Wilson <chris@chris-wilson.co.uk> | 2020-12-24 13:55:36 +0000 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2020-12-24 15:02:35 +0000 |
commit | 16f2941ad3078cac9c9ad69f3205fe4619f49edf (patch) | |
tree | 48a0e0eb62b5a118f9b7fcba36e74fcf1fb0bb24 /drivers/gpu/drm/i915/gt/intel_engine_types.h | |
parent | drm/i915/gem: Optimistically prune dma-resv from the shrinker. (diff) | |
download | linux-dev-16f2941ad3078cac9c9ad69f3205fe4619f49edf.tar.xz linux-dev-16f2941ad3078cac9c9ad69f3205fe4619f49edf.zip |
drm/i915/gt: Replace direct submit with direct call to tasklet
Rather than having special case code for opportunistically calling
process_csb() and performing a direct submit while holding the engine
spinlock for submitting the request, simply call the tasklet directly.
This allows us to retain the direct submission path, including the CS
draining to allow fast/immediate submissions, without requiring any
duplicated code paths, and most importantly greatly simplifying the
control flow by removing reentrancy. This will enable us to close a few
races in the virtual engines in the next few patches.
The trickiest part here is to ensure that paired operations (such as
schedule_in/schedule_out) remain under consistent locking domains,
e.g. when pulled outside of the engine->active.lock
v2: Use bh kicking, see commit 3c53776e29f8 ("Mark HI and TASKLET
softirq synchronous").
v3: Update engine-reset to be tasklet aware
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201224135544.1713-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_engine_types.h')
-rw-r--r-- | drivers/gpu/drm/i915/gt/intel_engine_types.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h index 02ee1e736982..c28f4e190fe6 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h @@ -184,7 +184,8 @@ struct intel_engine_execlists { * Reserve the upper 16b for tracking internal errors. */ u32 error_interrupt; -#define ERROR_CSB BIT(31) +#define ERROR_CSB BIT(31) +#define ERROR_PREEMPT BIT(30) /** * @reset_ccid: Active CCID [EXECLISTS_STATUS_HI] at the time of reset |