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authorChris Wilson <chris@chris-wilson.co.uk>2020-05-05 09:46:29 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2020-05-05 12:05:40 +0100
commitb68be5c623cdd62b9a8b99eb1443ba9cba812d6d (patch)
treee54fab086ec5c73c74a314aaff1b2f73a57970a4 /drivers/gpu/drm/i915/gt/intel_engine_types.h
parentdrm/i915: Added required new PCode commands (diff)
downloadlinux-dev-b68be5c623cdd62b9a8b99eb1443ba9cba812d6d.tar.xz
linux-dev-b68be5c623cdd62b9a8b99eb1443ba9cba812d6d.zip
drm/i915/execlists: Record the active CCID from before reset
If we cannot trust the reset will flush out the CS event queue such that process_csb() reports an accurate view of HW, we will need to search the active and pending contexts to determine which was actually running at the time we issued the reset. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200505084629.31365-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_engine_types.h')
-rw-r--r--drivers/gpu/drm/i915/gt/intel_engine_types.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 6c676774dcd9..b1048f039552 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -180,6 +180,11 @@ struct intel_engine_execlists {
u32 error_interrupt;
/**
+ * @reset_ccid: Active CCID [EXECLISTS_STATUS_HI] at the time of reset
+ */
+ u32 reset_ccid;
+
+ /**
* @no_priolist: priority lists disabled
*/
bool no_priolist;