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author | Chris Wilson <chris@chris-wilson.co.uk> | 2019-12-11 11:04:34 +0000 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-12-11 22:40:39 +0000 |
commit | 755bf8a8c9850f418e9a585f067e431677219260 (patch) | |
tree | e4b4b3ad55ea19935e7a65dfd61d216e1941d08c /drivers/gpu/drm/i915/gt/intel_gpu_commands.h | |
parent | drm/i915: Fix cmdparser drm.debug (diff) | |
download | linux-dev-755bf8a8c9850f418e9a585f067e431677219260.tar.xz linux-dev-755bf8a8c9850f418e9a585f067e431677219260.zip |
drm/i915: Remove redundant parameters from intel_engine_cmd_parser
Declutter the calling interface by reducing the parameters to the
i915_vma and associated offsets.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191211110437.4082687-2-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_gpu_commands.h')
-rw-r--r-- | drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h index 4294f146f13c..c68c0e033f30 100644 --- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h +++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h @@ -7,6 +7,8 @@ #ifndef _INTEL_GPU_COMMANDS_H_ #define _INTEL_GPU_COMMANDS_H_ +#include <linux/bitops.h> + /* * Target address alignments required for GPU access e.g. * MI_STORE_DWORD_IMM. @@ -319,4 +321,23 @@ #define COLOR_BLT ((0x2<<29)|(0x40<<22)) #define SRC_COPY_BLT ((0x2<<29)|(0x43<<22)) +/* + * Used to convert any address to canonical form. + * Starting from gen8, some commands (e.g. STATE_BASE_ADDRESS, + * MI_LOAD_REGISTER_MEM and others, see Broadwell PRM Vol2a) require the + * addresses to be in a canonical form: + * "GraphicsAddress[63:48] are ignored by the HW and assumed to be in correct + * canonical form [63:48] == [47]." + */ +#define GEN8_HIGH_ADDRESS_BIT 47 +static inline u64 gen8_canonical_addr(u64 address) +{ + return sign_extend64(address, GEN8_HIGH_ADDRESS_BIT); +} + +static inline u64 gen8_noncanonical_addr(u64 address) +{ + return address & GENMASK_ULL(GEN8_HIGH_ADDRESS_BIT, 0); +} + #endif /* _INTEL_GPU_COMMANDS_H_ */ |