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authorChris Wilson <chris@chris-wilson.co.uk>2019-12-19 12:43:52 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2019-12-19 17:03:56 +0000
commitdc93c9b69315167f5678b94aa911dc8e7c299fe5 (patch)
tree5413c127aa08aaeb9db78bee5a0ba236921552fe /drivers/gpu/drm/i915/gt/intel_gt_requests.c
parentdrm/i915/dsc: fix DSC power domains for DSI (diff)
downloadlinux-dev-dc93c9b69315167f5678b94aa911dc8e7c299fe5.tar.xz
linux-dev-dc93c9b69315167f5678b94aa911dc8e7c299fe5.zip
drm/i915/gt: Schedule request retirement when signaler idles
Very similar to commit 4f88f8747fa4 ("drm/i915/gt: Schedule request retirement when timeline idles"), but this time instead of coupling into the execlists CS event interrupt, we couple into the breadcrumb interrupt and queue a timeline's retirement when the last signaler is completed. This should allow us to more rapidly park ringbuffer submission, and so help reduce power consumption on older systems. v2: Fixup intel_engine_add_retire() to handle concurrent callers References: 4f88f8747fa4 ("drm/i915/gt: Schedule request retirement when timeline idles") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191219124353.8607-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_gt_requests.c')
-rw-r--r--drivers/gpu/drm/i915/gt/intel_gt_requests.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index 8cb5421e5f0e..0d1bca787288 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -62,19 +62,16 @@ static void engine_retire(struct work_struct *work)
static bool add_retire(struct intel_engine_cs *engine,
struct intel_timeline *tl)
{
+#define STUB ((struct intel_timeline *)1)
struct intel_timeline *first;
/*
* We open-code a llist here to include the additional tag [BIT(0)]
* so that we know when the timeline is already on a
* retirement queue: either this engine or another.
- *
- * However, we rely on that a timeline can only be active on a single
- * engine at any one time and that add_retire() is called before the
- * engine releases the timeline and transferred to another to retire.
*/
- if (READ_ONCE(tl->retire)) /* already queued */
+ if (cmpxchg(&tl->retire, NULL, STUB)) /* already queued */
return false;
intel_timeline_get(tl);