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authorChris Wilson <chris@chris-wilson.co.uk>2019-06-26 00:33:48 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2019-06-26 07:25:52 +0100
commitb38565faded7da1f84b2b9a9a6d41ea1ebc48936 (patch)
tree863fb5c86138695c551f4e8f329f79ceeef4295d /drivers/gpu/drm/i915/gt/intel_timeline.c
parentdrm/i915/selftests: Hold ref on request across waits (diff)
downloadlinux-dev-b38565faded7da1f84b2b9a9a6d41ea1ebc48936.tar.xz
linux-dev-b38565faded7da1f84b2b9a9a6d41ea1ebc48936.zip
drm/i915/gt: Drop stale commentary for timeline density
We no longer allocate a contiguous set of timeline ids for all engines upon creation, so we no longer should assume that the timelines are densely allocated within a context. Hopefully, the set of fences used within a workload are still dense enough for us to take advantage of the compressed radix tree used for the syncmap. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190625233349.32371-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_timeline.c')
-rw-r--r--drivers/gpu/drm/i915/gt/intel_timeline.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
index 478258274986..3bbb632cb535 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -210,16 +210,6 @@ int intel_timeline_init(struct intel_timeline *timeline,
{
void *vaddr;
- /*
- * Ideally we want a set of engines on a single leaf as we expect
- * to mostly be tracking synchronisation between engines. It is not
- * a huge issue if this is not the case, but we may want to mitigate
- * any page crossing penalties if they become an issue.
- *
- * Called during early_init before we know how many engines there are.
- */
- BUILD_BUG_ON(KSYNCMAP < I915_NUM_ENGINES);
-
timeline->gt = gt;
timeline->pin_count = 0;
timeline->has_initial_breadcrumb = !hwsp;