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| author |   Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2019-06-29 14:13:50 +0100 |
|---|---|---|
| committer |   Chris Wilson <chris@chris-wilson.co.uk> | 2019-07-02 12:15:19 +0100 |
| commit | 361b69051326ed0e07553315227678d00d651a9e (patch) | |
| tree | 0f817bcb42d391a1dc2d30993638d1b87c5e13e0 /drivers/gpu/drm/i915/gt/selftest_workarounds.c | |
| parent | drm/i915: Report if i915_active is still busy upon waiting (diff) | |
| download | linux-dev-361b69051326ed0e07553315227678d00d651a9e.tar.xz linux-dev-361b69051326ed0e07553315227678d00d651a9e.zip | |
drm/i915: fix whitelist selftests with readonly registers
When a register is readonly there is not much we can tell about its
value (apart from its default value?). This can be covered by tests
exercising the value of the register from userspace.
For PS_INVOCATION_COUNT we've got the following piglit tests :
KHR-GL45.pipeline_statistics_query_tests_ARB.functional_fragment_shader_invocations
Vulkan CTS tests :
dEQP-VK.query_pool.statistics_query.fragment_shader_invocations.*
v2: Use a local to shrink under 80cols.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 86554f48e511 ("drm/i915/selftests: Verify whitelist of context registers")
Tested-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190629131350.31185-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gt/selftest_workarounds.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/selftest_workarounds.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c index f12cb20fe785..b933d831eeb1 100644 --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c @@ -926,7 +926,12 @@ check_whitelisted_registers(struct intel_engine_cs *engine, err = 0; for (i = 0; i < engine->whitelist.count; i++) { - if (!fn(engine, a[i], b[i], engine->whitelist.list[i].reg)) + const struct i915_wa *wa = &engine->whitelist.list[i]; + + if (i915_mmio_reg_offset(wa->reg) & RING_FORCE_TO_NONPRIV_RD) + continue; + + if (!fn(engine, a[i], b[i], wa->reg)) err = -EINVAL; } |