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| author |   Matt Roper <matthew.d.roper@intel.com> | 2022-01-27 15:43:33 -0800 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2022-02-02 07:59:14 -0800 |
| commit | 0d6419e9c855dea476300e2bb81d29105fe76d38 (patch) | |
| tree | 7ad758db4e2f3a09a01f32f3f14257765ee02935 /drivers/gpu/drm/i915/gvt/handlers.c | |
| parent | drm/i915: Parameterize MI_PREDICATE registers (diff) | |
| download | linux-dev-0d6419e9c855dea476300e2bb81d29105fe76d38.tar.xz linux-dev-0d6419e9c855dea476300e2bb81d29105fe76d38.zip | |
drm/i915: Move GT registers to their own header file
This is a huge, chaotic mass of registers copied over as-is without any
real cleanup. We'll come back and organize these better, align on
consistent coding style, remove dead code, etc. in separate patches
later that will be easier to review.
v2:
- Add missing include in intel_pxp_irq.c
v3:
- Correct a few indentation errors (Lucas)
- Minor conflict resolution
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220127234334.4016964-6-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/handlers.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gvt/handlers.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index a1f9ab4a4e63..02271b920843 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c @@ -41,6 +41,7 @@ #include "i915_pvinfo.h" #include "display/intel_display_types.h" #include "display/intel_fbc.h" +#include "gt/intel_gt_regs.h" /* XXX FIXME i915 has changed PP_XXX definition */ #define PCH_PP_STATUS _MMIO(0xc7200) |