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| author |   Maxime Ripard <maxime@cerno.tech> | 2020-03-04 08:56:28 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime@cerno.tech> | 2020-03-04 08:56:28 +0100 |
| commit | 83794ee6c13b41c7db86ccfcaa20dc360b08fdb6 (patch) | |
| tree | c80162f31fdea3ddded188870e61d5dc71cbf892 /drivers/gpu/drm/i915/gvt/handlers.c | |
| parent | drm/hdcp: fix DRM_HDCP_2_KSV_COUNT_2_LSBITS (diff) | |
| parent | Merge tag 'drm-misc-next-2020-02-27' of git://anongit.freedesktop.org/drm/drm-misc into drm-next (diff) | |
| download | linux-dev-83794ee6c13b41c7db86ccfcaa20dc360b08fdb6.tar.xz linux-dev-83794ee6c13b41c7db86ccfcaa20dc360b08fdb6.zip | |
Merge drm/drm-next into drm-misc-next
Daniel needs a few commits from drm-next.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/handlers.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gvt/handlers.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index 6d28d72e6c7e..ae6700dc9d73 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c @@ -2415,9 +2415,9 @@ static int init_generic_mmio_info(struct intel_gvt *gvt) MMIO_F(_MMIO(0x7144c), 0xc, 0, 0, 0, D_PRE_SKL, NULL, NULL); MMIO_F(_MMIO(0x7244c), 0xc, 0, 0, 0, D_PRE_SKL, NULL, NULL); - MMIO_D(PIPE_WM_LINETIME(PIPE_A), D_ALL); - MMIO_D(PIPE_WM_LINETIME(PIPE_B), D_ALL); - MMIO_D(PIPE_WM_LINETIME(PIPE_C), D_ALL); + MMIO_D(WM_LINETIME(PIPE_A), D_ALL); + MMIO_D(WM_LINETIME(PIPE_B), D_ALL); + MMIO_D(WM_LINETIME(PIPE_C), D_ALL); MMIO_D(SPLL_CTL, D_ALL); MMIO_D(_MMIO(_WRPLL_CTL1), D_ALL); MMIO_D(_MMIO(_WRPLL_CTL2), D_ALL); @@ -2902,7 +2902,7 @@ static int init_skl_mmio_info(struct intel_gvt *gvt) MMIO_D(HSW_PWR_WELL_CTL1, D_SKL_PLUS); MMIO_DH(HSW_PWR_WELL_CTL2, D_SKL_PLUS, NULL, skl_power_well_ctl_write); - MMIO_DH(DBUF_CTL, D_SKL_PLUS, NULL, gen9_dbuf_ctl_mmio_write); + MMIO_DH(DBUF_CTL_S(0), D_SKL_PLUS, NULL, gen9_dbuf_ctl_mmio_write); MMIO_D(GEN9_PG_ENABLE, D_SKL_PLUS); MMIO_D(GEN9_MEDIA_PG_IDLE_HYSTERESIS, D_SKL_PLUS); |