diff options
author | Zhi Wang <zhi.a.wang@intel.com> | 2016-05-01 07:42:16 -0400 |
---|---|---|
committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2016-10-14 18:14:50 +0800 |
commit | e473405783c064a9d859d108010581bae8e9af40 (patch) | |
tree | 8c16c8763dbd90cd994ad530d02f64f98aa61718 /drivers/gpu/drm/i915/gvt/handlers.c | |
parent | drm/i915/gvt: vGPU workload submission (diff) | |
download | linux-dev-e473405783c064a9d859d108010581bae8e9af40.tar.xz linux-dev-e473405783c064a9d859d108010581bae8e9af40.zip |
drm/i915/gvt: vGPU workload scheduler
This patch introduces the vGPU workload scheduler routines.
GVT workload scheduler is responsible for picking and executing GVT workload
from current scheduled vGPU. Before the workload is submitted to host i915,
the guest execlist context will be shadowed in the host GVT shadow context.
the instructions in guest ring buffer will be copied into GVT shadow ring
buffer. Then GVT-g workload scheduler will scan the instructions in guest
ring buffer and submit it to host i915.
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/handlers.c')
-rw-r--r-- | drivers/gpu/drm/i915/gvt/handlers.c | 25 |
1 files changed, 23 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index 970804aed381..04da35c2600a 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c @@ -227,11 +227,32 @@ static int mul_force_wake_write(struct intel_vgpu *vgpu, return 0; } +static int handle_device_reset(struct intel_vgpu *vgpu, unsigned int offset, + void *p_data, unsigned int bytes, unsigned long bitmap) +{ + struct intel_gvt_workload_scheduler *scheduler = + &vgpu->gvt->scheduler; + + vgpu->resetting = true; + + if (scheduler->current_vgpu == vgpu) { + mutex_unlock(&vgpu->gvt->lock); + intel_gvt_wait_vgpu_idle(vgpu); + mutex_lock(&vgpu->gvt->lock); + } + + intel_vgpu_reset_execlist(vgpu, bitmap); + + vgpu->resetting = false; + + return 0; +} + static int gdrst_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) { u32 data; - u32 bitmap = 0; + u64 bitmap = 0; data = vgpu_vreg(vgpu, offset); @@ -260,7 +281,7 @@ static int gdrst_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, if (HAS_BSD2(vgpu->gvt->dev_priv)) bitmap |= (1 << VCS2); } - return 0; + return handle_device_reset(vgpu, offset, p_data, bytes, bitmap); } static int gmbus_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, |