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authorYan Zhao <yan.y.zhao@intel.com>2020-12-23 11:45:00 +0800
committerZhenyu Wang <zhenyuw@linux.intel.com>2020-12-25 11:15:15 +0800
commit3c4f2120d890b53855366c2e53ebe20806ed0cad (patch)
treea816fdc0d3e087588851abdb94fcaa039c2e73e9 /drivers/gpu/drm/i915/gvt/reg.h
parentdrm/i915/gvt: parse init context to update cmd accessible reg whitelist (diff)
downloadlinux-dev-3c4f2120d890b53855366c2e53ebe20806ed0cad.tar.xz
linux-dev-3c4f2120d890b53855366c2e53ebe20806ed0cad.zip
drm/i915/gvt: scan VM ctx pages
Logical Context is actually a big batch buffer consisting of multiple LRI commands + saved registers. It comprises Ring Context (the first 0x50 dwords) and Engine Context. The registers defined in Engine Context are command accessible, and safe to execute in VM Context. This patch 1. stops copy Ring Context and only copys Engine Context from VM Context 2. audits VM Engine Contexts to disallow undesired LRIs (if accessing registers out of Engine Context that hardware generates). Cc: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Wang Zhi <zhi.a.wang@intel.com> Signed-off-by: Yan Zhao <yan.y.zhao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20201223034500.16983-1-yan.y.zhao@intel.com Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/reg.h')
-rw-r--r--drivers/gpu/drm/i915/gvt/reg.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gvt/reg.h b/drivers/gpu/drm/i915/gvt/reg.h
index b58860dee970..244cc7320b54 100644
--- a/drivers/gpu/drm/i915/gvt/reg.h
+++ b/drivers/gpu/drm/i915/gvt/reg.h
@@ -133,4 +133,6 @@
#define RING_GFX_MODE(base) _MMIO((base) + 0x29c)
#define VF_GUARDBAND _MMIO(0x83a4)
+
+#define BCS_TILE_REGISTER_VAL_OFFSET (0x43*4)
#endif