aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/gvt/scheduler.h
diff options
context:
space:
mode:
authorChris Wilson <chris@chris-wilson.co.uk>2017-01-06 19:58:16 +0000
committerZhenyu Wang <zhenyuw@linux.intel.com>2017-01-17 16:54:23 +0800
commit62f0a11e2339e1ba154600d1f49ef5d5d84eaae4 (patch)
tree048daf5d39393f42f720b84a2751b694a53bc14a /drivers/gpu/drm/i915/gvt/scheduler.h
parentdrm/i915/gvt: Enable the shadow batch buffer (diff)
downloadlinux-dev-62f0a11e2339e1ba154600d1f49ef5d5d84eaae4.tar.xz
linux-dev-62f0a11e2339e1ba154600d1f49ef5d5d84eaae4.zip
drm/i915/gvt: Fix relocation of shadow bb
set_gma_to_bb_cmd() is completely bogus - it is (incorrectly) applying the rules to read a GTT offset from a command as opposed to writing the GTT offset. And to cap it all set_gma_to_bb_cmd() is called within a list iterator of the most strange construction. Fixes: be1da7070aea ("drm/i915/gvt: vGPU command scanner") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Zhenyu Wang <zhenyuw@linux.intel.com> Cc: Zhi Wang <zhi.a.wang@intel.com> Cc: Yulei Zhang <yulei.zhang@intel.com> Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.10-rc1+ Tested-by: Tina Zhang <tina.zhang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/scheduler.h')
-rw-r--r--drivers/gpu/drm/i915/gvt/scheduler.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.h b/drivers/gpu/drm/i915/gvt/scheduler.h
index 3b30c28bff51..2833dfa8c9ae 100644
--- a/drivers/gpu/drm/i915/gvt/scheduler.h
+++ b/drivers/gpu/drm/i915/gvt/scheduler.h
@@ -113,7 +113,7 @@ struct intel_shadow_bb_entry {
struct drm_i915_gem_object *obj;
void *va;
unsigned long len;
- void *bb_start_cmd_va;
+ u32 *bb_start_cmd_va;
};
#define workload_q_head(vgpu, ring_id) \