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| author |   Zhenyu Wang <zhenyuw@linux.intel.com> | 2017-10-19 13:54:06 +0800 |
|---|---|---|
| committer |   Zhi Wang <zhi.a.wang@intel.com> | 2017-10-27 01:37:13 +0800 |
| commit | 8f63fc2bc64716c16e269ab951130eeda78fe37a (patch) | |
| tree | 00e99c32ef565e405c22d01d53b25201a9eed18f /drivers/gpu/drm/i915/gvt/scheduler.h | |
| parent | drm/i915/perf: fix perf enable/disable ioctls with 32bits userspace (diff) | |
| download | linux-dev-8f63fc2bc64716c16e269ab951130eeda78fe37a.tar.xz linux-dev-8f63fc2bc64716c16e269ab951130eeda78fe37a.zip | |
drm/i915/gvt: properly check per_ctx bb valid state
Need to check valid state for per_ctx bb and bypass batch buffer
combine for scan if necessary. Otherwise adding invalid MI batch
buffer start cmd for per_ctx bb will cause scan failure, which is
taken as -EFAULT now so vGPU would be put in failsafe. This trys
to fix that by checking per_ctx bb valid state. Also remove old
invalid WARNING that indirect ctx bb shouldn't depend on valid
per_ctx bb.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/scheduler.h')
| -rw-r--r-- | drivers/gpu/drm/i915/gvt/scheduler.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.h b/drivers/gpu/drm/i915/gvt/scheduler.h index 0d431a968a32..93a49eb0209e 100644 --- a/drivers/gpu/drm/i915/gvt/scheduler.h +++ b/drivers/gpu/drm/i915/gvt/scheduler.h @@ -68,6 +68,7 @@ struct shadow_indirect_ctx { struct shadow_per_ctx { unsigned long guest_gma; unsigned long shadow_gma; + unsigned valid; }; struct intel_shadow_wa_ctx { |