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| author |   Dave Airlie <airlied@redhat.com> | 2015-09-04 13:09:20 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2015-09-04 13:09:20 +1000 |
| commit | 5b78cb668764061bd8a06f73f9bd081ba6942fef (patch) | |
| tree | ec2c05f75d4cb3d5a667bf0bde7d623db2f84d40 /drivers/gpu/drm/i915/i915_debugfs.c | |
| parent | Merge branch 'drm-rockchip-2015-08-26' of https://github.com/markyzq/kernel-drm-rockchip into drm-next (diff) | |
| parent | i915: Set ddi_pll_sel in DP MST path (diff) | |
| download | linux-dev-5b78cb668764061bd8a06f73f9bd081ba6942fef.tar.xz linux-dev-5b78cb668764061bd8a06f73f9bd081ba6942fef.zip | |
Merge tag 'drm-intel-next-fixes-2015-09-02' of git://anongit.freedesktop.org/drm-intel into drm-next
i915 display fixes headed for v4.3. Mostly SKL, but some regression
fixes too.
* tag 'drm-intel-next-fixes-2015-09-02' of git://anongit.freedesktop.org/drm-intel:
i915: Set ddi_pll_sel in DP MST path
drm/i915: Don't use link_bw for PLL setup
drm/i915: Preserve SSC earlier
drm/i915/skl: Adding DDI_E power well domain
drm/i915: eDP can be present on DDI-E
drm/i915/skl: Enable DDI-E
drm/i915: Enable HDMI on DDI-E
drm/i915: apply the PCI_D0/D3 hibernation workaround everywhere on pre GEN6
drm/i915: Check DP link status on long hpd too
drm/i915: set CDCLK if DPLL0 enabled during resuming from S3
Diffstat (limited to 'drivers/gpu/drm/i915/i915_debugfs.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 33aabc79813b..e3ec9049081f 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2562,6 +2562,8 @@ static const char *power_domain_str(enum intel_display_power_domain domain) return "PORT_DDI_D_2_LANES"; case POWER_DOMAIN_PORT_DDI_D_4_LANES: return "PORT_DDI_D_4_LANES"; + case POWER_DOMAIN_PORT_DDI_E_2_LANES: + return "PORT_DDI_E_2_LANES"; case POWER_DOMAIN_PORT_DSI: return "PORT_DSI"; case POWER_DOMAIN_PORT_CRT: |