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author | Matt Roper <matthew.d.roper@intel.com> | 2021-07-29 09:59:54 -0700 |
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committer | Matt Roper <matthew.d.roper@intel.com> | 2021-08-05 08:06:01 -0700 |
commit | 1705f22c86fb2654df22169c020d9d4ff193e47b (patch) | |
tree | 29b520dc81f0b5537b64135c5d2cf8b0a254fd4d /drivers/gpu/drm/i915/i915_drv.c | |
parent | drm/i915/xehpsdv: Define steering tables (diff) | |
download | linux-dev-1705f22c86fb2654df22169c020d9d4ff193e47b.tar.xz linux-dev-1705f22c86fb2654df22169c020d9d4ff193e47b.zip |
drm/i915/dg2: Update steering tables
DG2's replicated register ranges are almost the same at XeHP SDV with
the exception of one LNCF sub-range that switches to gslice steering.
We can re-use the XeHP SDV mslice steering table and just provide a
DG2-specific LNCF steering table.
Bspec: 66534
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210729170008.2836648-5-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.c')
0 files changed, 0 insertions, 0 deletions