diff options
| author |   Jani Nikula <jani.nikula@intel.com> | 2022-08-19 15:02:44 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2022-08-24 11:45:26 +0300 |
| commit | 00c6cbfd4e8a3279876babbac2f4a3f811d93b1f (patch) | |
| tree | 7445bdd3b795779eddcaae85e16145d31a2acf2f /drivers/gpu/drm/i915/i915_drv.h | |
| parent | drm/i915: move platform_engine_mask to runtime info (diff) | |
| download | linux-dev-00c6cbfd4e8a3279876babbac2f4a3f811d93b1f.tar.xz linux-dev-00c6cbfd4e8a3279876babbac2f4a3f811d93b1f.zip | |
drm/i915: move pipe_mask and cpu_transcoder_mask to runtime info
If it's modified runtime, it's runtime info.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/bff2ea209031063cec38085518508394b064df4a.1660910433.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 036d74255148..d0ce04080748 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1264,7 +1264,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define HAS_PSR_HW_TRACKING(dev_priv) \ (INTEL_INFO(dev_priv)->display.has_psr_hw_tracking) #define HAS_PSR2_SEL_FETCH(dev_priv) (DISPLAY_VER(dev_priv) >= 12) -#define HAS_TRANSCODER(dev_priv, trans) ((INTEL_INFO(dev_priv)->display.cpu_transcoder_mask & BIT(trans)) != 0) +#define HAS_TRANSCODER(dev_priv, trans) ((RUNTIME_INFO(dev_priv)->cpu_transcoder_mask & BIT(trans)) != 0) #define HAS_RC6(dev_priv) (INTEL_INFO(dev_priv)->has_rc6) #define HAS_RC6p(dev_priv) (INTEL_INFO(dev_priv)->has_rc6p) @@ -1335,9 +1335,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define GT_FREQUENCY_MULTIPLIER 50 #define GEN9_FREQ_SCALER 3 -#define INTEL_NUM_PIPES(dev_priv) (hweight8(INTEL_INFO(dev_priv)->display.pipe_mask)) +#define INTEL_NUM_PIPES(dev_priv) (hweight8(RUNTIME_INFO(dev_priv)->pipe_mask)) -#define HAS_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->display.pipe_mask != 0) +#define HAS_DISPLAY(dev_priv) (RUNTIME_INFO(dev_priv)->pipe_mask != 0) #define HAS_VRR(i915) (DISPLAY_VER(i915) >= 11) |