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authorTvrtko Ursulin <tvrtko.ursulin@intel.com>2021-10-05 12:31:35 +0100
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>2021-10-06 08:44:35 +0100
commit07f82a47e8a985ef939826ee8d75fe108c98126e (patch)
tree351e77993ae420d23bb85a97dec55973984236c5 /drivers/gpu/drm/i915/i915_drv.h
parentdrm/i915: Fix bug in user proto-context creation that leaked contexts (diff)
downloadlinux-dev-07f82a47e8a985ef939826ee8d75fe108c98126e.tar.xz
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drm/i915: Handle Intel igfx + Intel dgfx hybrid graphics setup
In short this makes i915 work for hybrid setups (DRI_PRIME=1 with Mesa) when rendering is done on Intel dgfx and scanout/composition on Intel igfx. Before this patch the driver was not quite ready for that setup, mainly because it was able to emit a semaphore wait between the two GPUs, which results in deadlocks because semaphore target location in HWSP is neither shared between the two, nor mapped in both GGTT spaces. To fix it the patch adds an additional check to a couple of relevant code paths in order to prevent using semaphores for inter-engine synchronisation when relevant objects are not in the same GGTT space. v2: * Avoid adding rq->i915. (Chris) v3: * Use GGTT which describes the limit more precisely. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Matthew Auld <matthew.auld@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211005113135.768295-1-tvrtko.ursulin@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
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