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| author |   Chris Wilson <chris@chris-wilson.co.uk> | 2017-02-17 16:38:33 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2017-02-20 14:32:25 +0000 |
| commit | 944a36d472be642d0d082d2480fe2b40046602a9 (patch) | |
| tree | 57a2b7a932fb454c5d230bb75e7921c8da28ab32 /drivers/gpu/drm/i915/i915_gem_batch_pool.c | |
| parent | drm/i915: Add power well SW/HW state verification (diff) | |
| download | linux-dev-944a36d472be642d0d082d2480fe2b40046602a9.tar.xz linux-dev-944a36d472be642d0d082d2480fe2b40046602a9.zip | |
drm/i915: Assert that the request->tail is always qword aligned
The hardware requires that the tail pointer only advance in qword units,
so assert that the value we write is aligned to qwords, and similarly
enforce this restriction onto the request->tail.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170217163833.731-1-chris@chris-wilson.co.uk
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_batch_pool.c')
0 files changed, 0 insertions, 0 deletions