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authorChris Wilson <chris@chris-wilson.co.uk>2016-08-05 10:14:22 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2016-08-05 10:54:42 +0100
commitdeeb1519b65a92ca06c8e8554a92df0fdb4d5dea (patch)
tree8a8a464b76cc6000dbfb79cdf5fe3b3e53e0c401 /drivers/gpu/drm/i915/i915_gem_tiling.c
parentdrm/i915: Remove locking for get_tiling (diff)
downloadlinux-dev-deeb1519b65a92ca06c8e8554a92df0fdb4d5dea.tar.xz
linux-dev-deeb1519b65a92ca06c8e8554a92df0fdb4d5dea.zip
drm/i915: Document and reject invalid tiling modes
Through the GTT interface to the fence registers, we can only handle linear, X and Y tiling. The more esoteric tiling patterns are ignored. Document that the tiling ABI only supports upto Y tiling, and reject any attempts to set a tiling mode other than NONE, X or Y. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1470388464-28458-17-git-send-email-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_tiling.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem_tiling.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index c0e01333bddf..6817f69947d9 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -68,6 +68,9 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
if (tiling_mode == I915_TILING_NONE)
return true;
+ if (tiling_mode > I915_TILING_LAST)
+ return false;
+
if (IS_GEN2(dev) ||
(tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev)))
tile_width = 128;