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| author |   Vinod Govindapillai <vinod.govindapillai@intel.com> | 2022-03-29 02:00:00 +0300 |
|---|---|---|
| committer |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-03-31 14:35:37 +0300 |
| commit | bc58192a9b59fa75d5666bed9cc1b45fa49c6e0b (patch) | |
| tree | 9ad82b4c26406a3d7c6f24808e1b2d4a91bf5586 /drivers/gpu/drm/i915/i915_gpu_error.h | |
| parent | drm/i915/display/adlp: Fix programing of PIPE_MBUS_DBOX_CTL (diff) | |
| download | linux-dev-bc58192a9b59fa75d5666bed9cc1b45fa49c6e0b.tar.xz linux-dev-bc58192a9b59fa75d5666bed9cc1b45fa49c6e0b.zip | |
drm/i915: Handle the DG2 max bw properly
Update DG2 init bw info similar to other platforms even though
DG2 has constant bandwidh. This will avoid branching out DG2
specific max bw calls.
V3: Fix dg2_get_bw_info() and avoid handle special cases
for DG2 (Ville Syrjälä)
cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220328230000.215094-1-vinod.govindapillai@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gpu_error.h')
0 files changed, 0 insertions, 0 deletions