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authorMichał Winiarski <michal.winiarski@intel.com>2017-10-25 22:00:10 +0200
committerChris Wilson <chris@chris-wilson.co.uk>2017-10-26 21:35:21 +0100
commit89922d0145755b0d22906925e9bac9dc78524fc3 (patch)
treed2a94f03a163a9d96147625355a5877d7e1d6328 /drivers/gpu/drm/i915/i915_guc_submission.c
parentdrm/i915/guc: Do not use 0 for GuC doorbell cookie (diff)
downloadlinux-dev-89922d0145755b0d22906925e9bac9dc78524fc3.tar.xz
linux-dev-89922d0145755b0d22906925e9bac9dc78524fc3.zip
drm/i915/guc: Extract GuC stage desc pool creation into a helper
Since it's a two-step process, we can have a cleaner error handling in the caller if we do the allocations in a helper. Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Jeff McGee <jeff.mcgee@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Oscar Mateo <oscar.mateo@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20171025200020.16636-3-michal.winiarski@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_guc_submission.c')
-rw-r--r--drivers/gpu/drm/i915/i915_guc_submission.c65
1 files changed, 38 insertions, 27 deletions
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index 0b61bf18c3f4..e195bdee0473 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -311,6 +311,37 @@ static void guc_proc_desc_init(struct intel_guc *guc,
desc->priority = client->priority;
}
+static int guc_stage_desc_pool_create(struct intel_guc *guc)
+{
+ struct i915_vma *vma;
+ void *vaddr;
+
+ vma = intel_guc_allocate_vma(guc,
+ PAGE_ALIGN(sizeof(struct guc_stage_desc) *
+ GUC_MAX_STAGE_DESCRIPTORS));
+ if (IS_ERR(vma))
+ return PTR_ERR(vma);
+
+ vaddr = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
+ if (IS_ERR(vaddr)) {
+ i915_vma_unpin_and_release(&vma);
+ return PTR_ERR(vaddr);
+ }
+
+ guc->stage_desc_pool = vma;
+ guc->stage_desc_pool_vaddr = vaddr;
+ ida_init(&guc->stage_ids);
+
+ return 0;
+}
+
+static void guc_stage_desc_pool_destroy(struct intel_guc *guc)
+{
+ ida_destroy(&guc->stage_ids);
+ i915_gem_object_unpin_map(guc->stage_desc_pool->obj);
+ i915_vma_unpin_and_release(&guc->stage_desc_pool);
+}
+
/*
* Initialise/clear the stage descriptor shared with the GuC firmware.
*
@@ -953,47 +984,29 @@ static void guc_ads_destroy(struct intel_guc *guc)
int i915_guc_submission_init(struct drm_i915_private *dev_priv)
{
struct intel_guc *guc = &dev_priv->guc;
- struct i915_vma *vma;
- void *vaddr;
int ret;
if (guc->stage_desc_pool)
return 0;
- vma = intel_guc_allocate_vma(guc,
- PAGE_ALIGN(sizeof(struct guc_stage_desc) *
- GUC_MAX_STAGE_DESCRIPTORS));
- if (IS_ERR(vma))
- return PTR_ERR(vma);
-
- guc->stage_desc_pool = vma;
-
- vaddr = i915_gem_object_pin_map(guc->stage_desc_pool->obj, I915_MAP_WB);
- if (IS_ERR(vaddr)) {
- ret = PTR_ERR(vaddr);
- goto err_vma;
- }
-
- guc->stage_desc_pool_vaddr = vaddr;
+ ret = guc_stage_desc_pool_create(guc);
+ if (ret)
+ return ret;
ret = intel_guc_log_create(guc);
if (ret < 0)
- goto err_vaddr;
+ goto err_stage_desc_pool;
ret = guc_ads_create(guc);
if (ret < 0)
goto err_log;
- ida_init(&guc->stage_ids);
-
return 0;
err_log:
intel_guc_log_destroy(guc);
-err_vaddr:
- i915_gem_object_unpin_map(guc->stage_desc_pool->obj);
-err_vma:
- i915_vma_unpin_and_release(&guc->stage_desc_pool);
+err_stage_desc_pool:
+ guc_stage_desc_pool_destroy(guc);
return ret;
}
@@ -1001,11 +1014,9 @@ void i915_guc_submission_fini(struct drm_i915_private *dev_priv)
{
struct intel_guc *guc = &dev_priv->guc;
- ida_destroy(&guc->stage_ids);
guc_ads_destroy(guc);
intel_guc_log_destroy(guc);
- i915_gem_object_unpin_map(guc->stage_desc_pool->obj);
- i915_vma_unpin_and_release(&guc->stage_desc_pool);
+ guc_stage_desc_pool_destroy(guc);
}
static void guc_interrupts_capture(struct drm_i915_private *dev_priv)