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authorDave Airlie <airlied@redhat.com>2015-07-24 14:29:06 +1000
committerDave Airlie <airlied@redhat.com>2015-07-24 14:29:06 +1000
commitf60de9767490a73b54c2754e1de83fc68eb7d9a0 (patch)
tree66789fa6a012579e04049ee144424f1707ca8f12 /drivers/gpu/drm/i915/i915_params.c
parentMerge tag 'topic/drm-misc-2015-07-23' of git://anongit.freedesktop.org/drm-intel into drm-next (diff)
parentdrm/i915: Update DRIVER_DATE to 20150717 (diff)
downloadlinux-dev-f60de9767490a73b54c2754e1de83fc68eb7d9a0.tar.xz
linux-dev-f60de9767490a73b54c2754e1de83fc68eb7d9a0.zip
Merge tag 'drm-intel-next-2015-07-17' of git://anongit.freedesktop.org/drm-intel into drm-next
- prelim hw support dropped for skl after Damien fixed an ABI issue around planes - legacy modesetting is done using atomic infrastructure now (Maarten)! - more gen9 workarounds (Arun&Nick) - MOCS programming (cache control for better performance) for skl/bxt - vlv/chv dpll improvements (Ville) - PSR fixes from Rodrigo - fbc improvements from Paulo - plumb requests into execlist submit functions (Mika) - opregion code cleanup from Jani - resource streamer support from Abdiel for mesa - final fixes for 12bpc hdmi + enabling support from Ville drm-intel-next-2015-07-03: - dsi improvements (Gaurav) - bxt ddi dpll hw state readout (Imre) - chv dvfs support and overall wm improvements for both vlv and chv (Ville) - ppgtt polish from Mika and Michel - cdclk support for bxt (Bob Pauwe) - make frontbuffer tracking more precise - OLR removal (John Harrison) - per-ctx WA batch buffer support (Arun Siluvery) - remvoe KMS Kconfig option (Chris) - more hpd handling refactoring from Jani - use atomic states throughout modeset code and integrate with atomic plane update (Maarten) drm-intel-next-2015-06-19: - refactoring hpd irq handlers (Jani) - polish skl dpll code a bit (Damien) - dynamic cdclk adjustement (Ville & Mika) - fix up 12bpc hdmi and enable it for real again (Ville) - extend hsw cmd parser to be useful for atomic configuration (Franscico Jerez) - even more atomic conversion and rolling state handling out across modeset code from Maarten & Ander - fix DRRS idleness detection (Ramalingam) - clean up dsp address alignment handling (Ville) - some fbc cleanup patches from Paulo - prevent hard-hangs when trying to reset the gpu on skl (Mika) * tag 'drm-intel-next-2015-07-17' of git://anongit.freedesktop.org/drm-intel: (386 commits) drm/i915: Update DRIVER_DATE to 20150717 drm/i915/skl: Drop the preliminary_hw_support flag drm/i915/skl: Don't expose the top most plane on gen9 display drm/i915: Fix divide by zero on watermark update drm/i915: Invert fastboot check drm/i915: Clarify logic for initial modeset drm/i915: Unconditionally check gmch pfit state drm/i915: always disable irqs in intel_pipe_update_start drm/i915: Remove use of runtime pm in atomic commit functions drm/i915: Call plane update functions directly from intel_atomic_commit. drm/i915: Use full atomic modeset. drm/i915/gen9: Add WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken drm/i915/gen9: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround drm/i915/gen9: Add WaDisableCtxRestoreArbitration workaround drm/i915: Enable WA batch buffers for Gen9 drm/i915/gen9: Implement WaDisableKillLogic for gen 9 drm/i915: Use expcitly fixed type in compat32 structs drm/i915: Fix noatomic crtc disabling, v2. drm/i915: fill in more mode members drm/i915: Added BXT check in HAS_CORE_RING_FREQ macro ...
Diffstat (limited to 'drivers/gpu/drm/i915/i915_params.c')
-rw-r--r--drivers/gpu/drm/i915/i915_params.c15
1 files changed, 2 insertions, 13 deletions
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 8ac5a1b29ac0..5f4e7295295f 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -28,7 +28,6 @@ struct i915_params i915 __read_mostly = {
.modeset = -1,
.panel_ignore_lid = 1,
.semaphores = -1,
- .lvds_downclock = 0,
.lvds_channel_mode = 0,
.panel_use_ssc = -1,
.vbt_sdvo_panel_type = -1,
@@ -52,13 +51,12 @@ struct i915_params i915 __read_mostly = {
.use_mmio_flip = 0,
.mmio_debug = 0,
.verbose_state_checks = 1,
- .nuclear_pageflip = 0,
.edp_vswing = 0,
};
module_param_named(modeset, i915.modeset, int, 0400);
MODULE_PARM_DESC(modeset,
- "Use kernel modesetting [KMS] (0=DRM_I915_KMS from .config, "
+ "Use kernel modesetting [KMS] (0=disable, "
"1=on, -1=force vga console preference [default])");
module_param_named(panel_ignore_lid, i915.panel_ignore_lid, int, 0600);
@@ -84,11 +82,6 @@ MODULE_PARM_DESC(enable_fbc,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
-module_param_named(lvds_downclock, i915.lvds_downclock, int, 0400);
-MODULE_PARM_DESC(lvds_downclock,
- "Use panel (LVDS/eDP) downclocking for power savings "
- "(default: false)");
-
module_param_named(lvds_channel_mode, i915.lvds_channel_mode, int, 0600);
MODULE_PARM_DESC(lvds_channel_mode,
"Specify LVDS channel mode "
@@ -104,7 +97,7 @@ MODULE_PARM_DESC(vbt_sdvo_panel_type,
"Override/Ignore selection of SDVO panel mode in the VBT "
"(-2=ignore, -1=auto [default], index in VBT BIOS table)");
-module_param_named(reset, i915.reset, bool, 0600);
+module_param_named_unsafe(reset, i915.reset, bool, 0600);
MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)");
module_param_named(enable_hangcheck, i915.enable_hangcheck, bool, 0644);
@@ -182,10 +175,6 @@ module_param_named(verbose_state_checks, i915.verbose_state_checks, bool, 0600);
MODULE_PARM_DESC(verbose_state_checks,
"Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
-module_param_named_unsafe(nuclear_pageflip, i915.nuclear_pageflip, bool, 0600);
-MODULE_PARM_DESC(nuclear_pageflip,
- "Force atomic modeset functionality; only planes work for now (default: false).");
-
/* WA to get away with the default setting in VBT for early platforms.Will be removed */
module_param_named_unsafe(edp_vswing, i915.edp_vswing, int, 0400);
MODULE_PARM_DESC(edp_vswing,