diff options
| author |   José Roberto de Souza <jose.souza@intel.com> | 2022-05-05 12:35:19 -0700 |
|---|---|---|
| committer | José Roberto de Souza <jose.souza@intel.com> | 2022-05-06 09:28:13 -0700 |
| commit | 218076abbcd647de46635d21331a34b814f90906 (patch) | |
| tree | da976b6cf2810089da37d3da5d3b4b92610efecd /drivers/gpu/drm/i915/i915_pci.c | |
| parent | drm/i915: Drop has_gt_uc from device info (diff) | |
| download | linux-dev-218076abbcd647de46635d21331a34b814f90906.tar.xz linux-dev-218076abbcd647de46635d21331a34b814f90906.zip | |
drm/i915: Drop has_rc6 from device info
No need to have this parameter in intel_device_info struct
as all platforms with graphics version 6 or newer have software
support for this feature.
As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-2-jose.souza@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_pci.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_pci.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index a5f09a2f7472..1973d8e047f0 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -376,8 +376,6 @@ static const struct intel_device_info gm45_info = { .platform_engine_mask = BIT(RCS0) | BIT(VCS0), \ .has_snoop = true, \ .has_coherent_ggtt = true, \ - /* ilk does support rc6, but we do not implement [power] contexts */ \ - .has_rc6 = 0, \ .dma_mask_size = 36, \ I9XX_PIPE_OFFSETS, \ I9XX_CURSOR_OFFSETS, \ @@ -407,7 +405,6 @@ static const struct intel_device_info ilk_m_info = { .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \ .has_coherent_ggtt = true, \ .has_llc = 1, \ - .has_rc6 = 1, \ .has_rc6p = 1, \ .has_rps = true, \ .dma_mask_size = 40, \ @@ -458,7 +455,6 @@ static const struct intel_device_info snb_m_gt2_info = { .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \ .has_coherent_ggtt = true, \ .has_llc = 1, \ - .has_rc6 = 1, \ .has_rc6p = 1, \ .has_reset_engine = true, \ .has_rps = true, \ @@ -518,7 +514,6 @@ static const struct intel_device_info vlv_info = { .display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), .has_runtime_pm = 1, - .has_rc6 = 1, .has_reset_engine = true, .has_rps = true, .display.has_gmch = 1, @@ -617,7 +612,6 @@ static const struct intel_device_info chv_info = { .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), .has_64bit_reloc = 1, .has_runtime_pm = 1, - .has_rc6 = 1, .has_rps = true, .has_logical_ring_contexts = 1, .display.has_gmch = 1, @@ -700,7 +694,6 @@ static const struct intel_device_info skl_gt4_info = { .display.has_psr_hw_tracking = 1, \ .has_runtime_pm = 1, \ .display.has_dmc = 1, \ - .has_rc6 = 1, \ .has_rps = true, \ .display.has_dp_mst = 1, \ .has_logical_ring_contexts = 1, \ @@ -1010,7 +1003,6 @@ static const struct intel_device_info adl_p_info = { .has_logical_ring_contexts = 1, \ .has_logical_ring_elsq = 1, \ .has_mslices = 1, \ - .has_rc6 = 1, \ .has_reset_engine = 1, \ .has_rps = 1, \ .has_runtime_pm = 1, \ |