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| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-04-16 20:10:04 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-04-21 01:23:46 +0300 |
| commit | 708de86e10e59352eb57a3ad6a5a524d8f5c9f13 (patch) | |
| tree | 4bbef9eea1d05624bed43c66cc56ec3e889c5816 /drivers/gpu/drm/i915/i915_pci.c | |
| parent | drm/i915: fix an error code in intel_overlay_do_put_image() (diff) | |
| download | linux-dev-708de86e10e59352eb57a3ad6a5a524d8f5c9f13.tar.xz linux-dev-708de86e10e59352eb57a3ad6a5a524d8f5c9f13.zip | |
drm/i915: Collect dbuf device info into a sub-struct
Collect the related dbuf information into a struct.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210416171011.19012-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_pci.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_pci.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 44e7b94db63d..484d2633894a 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -647,8 +647,8 @@ static const struct intel_device_info chv_info = { .has_gt_uc = 1, \ .display.has_hdcp = 1, \ .display.has_ipc = 1, \ - .ddb_size = 896, \ - .num_supported_dbuf_slices = 1 + .dbuf.size = 896, \ + .dbuf.num_slices = 1 #define SKL_PLATFORM \ GEN9_FEATURES, \ @@ -683,7 +683,7 @@ static const struct intel_device_info skl_gt4_info = { #define GEN9_LP_FEATURES \ GEN(9), \ .is_lp = 1, \ - .num_supported_dbuf_slices = 1, \ + .dbuf.num_slices = 1, \ .display.has_hotplug = 1, \ .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \ .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \ @@ -720,14 +720,14 @@ static const struct intel_device_info skl_gt4_info = { static const struct intel_device_info bxt_info = { GEN9_LP_FEATURES, PLATFORM(INTEL_BROXTON), - .ddb_size = 512, + .dbuf.size = 512, }; static const struct intel_device_info glk_info = { GEN9_LP_FEATURES, PLATFORM(INTEL_GEMINILAKE), .display.ver = 10, - .ddb_size = 1024, + .dbuf.size = 1024, GLK_COLORS, }; @@ -790,7 +790,7 @@ static const struct intel_device_info cml_gt2_info = { #define GEN10_FEATURES \ GEN9_FEATURES, \ GEN(10), \ - .ddb_size = 1024, \ + .dbuf.size = 1024, \ .display.has_dsc = 1, \ .has_coherent_ggtt = false, \ GLK_COLORS @@ -830,8 +830,8 @@ static const struct intel_device_info cnl_info = { [TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \ }, \ GEN(11), \ - .ddb_size = 2048, \ - .num_supported_dbuf_slices = 2, \ + .dbuf.size = 2048, \ + .dbuf.num_slices = 2, \ .has_logical_ring_elsq = 1, \ .color = { .degamma_lut_size = 33, .gamma_lut_size = 262145 } |