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authorCarlos Santa <carlos.santa@intel.com>2016-08-17 12:30:44 -0700
committerRodrigo Vivi <rodrigo.vivi@intel.com>2016-09-07 16:07:08 -0700
commit86f3624bf2750d22a6d7290f625f2d11227edb21 (patch)
tree63a9a64e53dfca95479ba52f6ce0c083ef7ac493 /drivers/gpu/drm/i915/i915_pci.c
parentdrm/i915: Move HAS_RESOURCE_STREAMER definition to platform definition (diff)
downloadlinux-dev-86f3624bf2750d22a6d7290f625f2d11227edb21.tar.xz
linux-dev-86f3624bf2750d22a6d7290f625f2d11227edb21.zip
drm/i915: Move HAS_RC6 definition to platform definition
Moving all GPU features to the platform struct definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.santa@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_pci.c')
-rw-r--r--drivers/gpu/drm/i915/i915_pci.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 46c48eda23f6..42108dcaba17 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -201,6 +201,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
.has_fbc = 1, \
.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
.has_llc = 1, \
+ .has_rc6 = 1, \
GEN_DEFAULT_PIPEOFFSETS, \
CURSOR_OFFSETS
@@ -219,6 +220,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
.has_fbc = 1, \
.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
.has_llc = 1, \
+ .has_rc6 = 1, \
GEN_DEFAULT_PIPEOFFSETS, \
IVB_CURSOR_OFFSETS
@@ -243,6 +245,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
.gen = 7, .num_pipes = 2, \
.has_psr = 1, \
.has_runtime_pm = 1, \
+ .has_rc6 = 1, \
.need_gfx_hws = 1, .has_hotplug = 1, \
.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -293,6 +296,7 @@ static const struct intel_device_info intel_cherryview_info = {
.has_psr = 1,
.has_runtime_pm = 1,
.has_resource_streamer = 1,
+ .has_rc6 = 1,
.display_mmio_offset = VLV_DISPLAY_BASE,
GEN_CHV_PIPEOFFSETS,
CURSOR_OFFSETS,
@@ -327,6 +331,7 @@ static const struct intel_device_info intel_broxton_info = {
.has_pooled_eu = 0,
.has_csr = 1,
.has_resource_streamer = 1,
+ .has_rc6 = 1,
GEN_DEFAULT_PIPEOFFSETS,
IVB_CURSOR_OFFSETS,
BDW_COLORS,