aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/i915_pci.c
diff options
context:
space:
mode:
authorImre Deak <imre.deak@intel.com>2017-09-28 13:06:24 +0300
committerImre Deak <imre.deak@intel.com>2017-10-02 12:09:11 +0300
commit9dfe2e3ad375a9ba32a13888873ec4586be01ff7 (patch)
tree02e65e5010f99234570b61f07e3ad2a3092f5e5a /drivers/gpu/drm/i915/i915_pci.c
parentdrm/i915/gen9+: Set same power state before hibernation image save/restore (diff)
downloadlinux-dev-9dfe2e3ad375a9ba32a13888873ec4586be01ff7.tar.xz
linux-dev-9dfe2e3ad375a9ba32a13888873ec4586be01ff7.zip
drm/i915/gen8+: Init/reset display interrupts only if i915 IRQs are enabled
Only init / reset the display interrupts during power well enabling / disabling if the i915 interrupts are enabled. So far we did the init / reset during driver loading / resuming too, where initialization / enabling of the i915 interrupts happens only at a later point. This didn't cause a problem due to GEN8_MASTER_IRQ_CONTROL being cleared, but triggered gen3_assert_iir_is_zero() in GEN8_IRQ_INIT_NDX(). References: https://bugs.freedesktop.org/show_bug.cgi?id=102988 Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20170928100624.15533-1-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_pci.c')
0 files changed, 0 insertions, 0 deletions