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| author |   Michel Thierry <michel.thierry@intel.com> | 2016-12-05 17:57:03 -0800 |
|---|---|---|
| committer |   Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2016-12-07 07:09:55 +0000 |
| commit | 9e1d0e604e0e6bd32a55c5c2780ef0687a86c4b6 (patch) | |
| tree | a0fc8852d5b81f7c1278b0c9faa2eccd0e4bfa81 /drivers/gpu/drm/i915/i915_pci.c | |
| parent | drm/i915: Use memcpy_from_wc for GPU error capture (diff) | |
| download | linux-dev-9e1d0e604e0e6bd32a55c5c2780ef0687a86c4b6.tar.xz linux-dev-9e1d0e604e0e6bd32a55c5c2780ef0687a86c4b6.zip | |
drm/i915: Advertise ppgtt support type in platform definition
Instead of being hidden in sanitize_enable_ppgtt.
It also seems to be the place to do so nowadays.
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_pci.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_pci.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 389a33090707..d0b060a1ad7a 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -204,6 +204,7 @@ static const struct intel_device_info intel_ironlake_m_info = { .has_rc6p = 1, \ .has_gmbus_irq = 1, \ .has_hw_contexts = 1, \ + .has_aliasing_ppgtt = 1, \ GEN_DEFAULT_PIPEOFFSETS, \ CURSOR_OFFSETS @@ -226,6 +227,8 @@ static const struct intel_device_info intel_sandybridge_m_info = { .has_rc6p = 1, \ .has_gmbus_irq = 1, \ .has_hw_contexts = 1, \ + .has_aliasing_ppgtt = 1, \ + .has_full_ppgtt = 1, \ GEN_DEFAULT_PIPEOFFSETS, \ IVB_CURSOR_OFFSETS @@ -258,6 +261,8 @@ static const struct intel_device_info intel_ivybridge_q_info = { .has_hw_contexts = 1, \ .has_gmch_display = 1, \ .has_hotplug = 1, \ + .has_aliasing_ppgtt = 1, \ + .has_full_ppgtt = 1, \ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ .display_mmio_offset = VLV_DISPLAY_BASE, \ GEN_DEFAULT_PIPEOFFSETS, \ @@ -289,6 +294,7 @@ static const struct intel_device_info intel_haswell_info = { HSW_FEATURES, \ BDW_COLORS, \ .has_logical_ring_contexts = 1, \ + .has_full_48bit_ppgtt = 1, \ .has_64bit_reloc = 1 static const struct intel_device_info intel_broadwell_info = { @@ -318,6 +324,8 @@ static const struct intel_device_info intel_cherryview_info = { .has_hw_contexts = 1, .has_logical_ring_contexts = 1, .has_gmch_display = 1, + .has_aliasing_ppgtt = 1, + .has_full_ppgtt = 1, .display_mmio_offset = VLV_DISPLAY_BASE, GEN_CHV_PIPEOFFSETS, CURSOR_OFFSETS, @@ -364,6 +372,9 @@ static const struct intel_device_info intel_skylake_gt3_info = { .has_logical_ring_contexts = 1, \ .has_guc = 1, \ .has_decoupled_mmio = 1, \ + .has_aliasing_ppgtt = 1, \ + .has_full_ppgtt = 1, \ + .has_full_48bit_ppgtt = 1, \ GEN_DEFAULT_PIPEOFFSETS, \ IVB_CURSOR_OFFSETS, \ BDW_COLORS |