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authorChris Wilson <chris@chris-wilson.co.uk>2019-09-24 15:59:50 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2019-09-24 17:27:19 +0100
commit7dc56af5260e958e36a08b2e0822029ddf765770 (patch)
tree3c3070835947c4ba496b46dcd697100b2e2153b4 /drivers/gpu/drm/i915/i915_perf.h
parentdrm/i915: Add TigerLake bandwidth checking (diff)
downloadlinux-dev-7dc56af5260e958e36a08b2e0822029ddf765770.tar.xz
linux-dev-7dc56af5260e958e36a08b2e0822029ddf765770.zip
drm/i915/selftests: Verify the LRC register layout between init and HW
Before we submit the first context to HW, we need to construct a valid image of the register state. This layout is defined by the HW and should match the layout generated by HW when it saves the context image. Asserting that this should be equivalent should help avoid any undefined behaviour and verify that we haven't missed anything important! Of course, having insisted that the initial register state within the LRC should match that returned by HW, we need to ensure that it does. v2: Drop the RELATIVE_MMIO flag from gen11, we ignore it for constructing the lrc image. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190924145950.3011-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_perf.h')
-rw-r--r--drivers/gpu/drm/i915/i915_perf.h5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_perf.h b/drivers/gpu/drm/i915/i915_perf.h
index a412b16d9ffc..f4fb311184b1 100644
--- a/drivers/gpu/drm/i915/i915_perf.h
+++ b/drivers/gpu/drm/i915/i915_perf.h
@@ -25,8 +25,7 @@ int i915_perf_add_config_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
int i915_perf_remove_config_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
-void i915_oa_init_reg_state(struct intel_engine_cs *engine,
- struct intel_context *ce,
- u32 *reg_state);
+void i915_oa_init_reg_state(const struct intel_context *ce,
+ const struct intel_engine_cs *engine);
#endif /* __I915_PERF_H__ */