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authorChris Wilson <chris@chris-wilson.co.uk>2019-11-08 10:35:10 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2019-11-08 11:36:10 +0000
commitc1c82d267ae8b42de0802c31fabeb843189adb9d (patch)
treec18d868470d6cb6fade6ea47d792ac2853ac4104 /drivers/gpu/drm/i915/i915_pmu.c
parentdrm/i915/selftests: Mark up sole accessor to ctx->vm as being protected (diff)
downloadlinux-dev-c1c82d267ae8b42de0802c31fabeb843189adb9d.tar.xz
linux-dev-c1c82d267ae8b42de0802c31fabeb843189adb9d.zip
drm/i915/pmu: Cheat when reading the actual frequency to avoid fw
We want to avoid taking forcewake when querying the performance stats, as we wish to avoid perturbing the system under observation. (And with the forcewake being kept alive for 1ms after use, sampling the frequency from a 200Hz timer keeps forcewake 40% active.) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191108103511.20951-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_pmu.c')
-rw-r--r--drivers/gpu/drm/i915/i915_pmu.c17
1 files changed, 15 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 05395015d1f2..8e74f40413b8 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -366,8 +366,21 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns)
val = rps->cur_freq;
if (intel_gt_pm_get_if_awake(gt)) {
- val = intel_uncore_read_notrace(uncore, GEN6_RPSTAT1);
- val = intel_get_cagf(rps, val);
+ u32 stat;
+
+ /*
+ * We take a quick peek here without using forcewake
+ * so that we don't perturb the system under observation
+ * (forcewake => !rc6 => increased power use). We expect
+ * that if the read fails because it is outside of the
+ * mmio power well, then it will return 0 -- in which
+ * case we assume the system is running at the intended
+ * frequency. Fortunately, the read should rarely fail!
+ */
+ stat = intel_uncore_read_fw(uncore, GEN6_RPSTAT1);
+ if (stat)
+ val = intel_get_cagf(rps, stat);
+
intel_gt_pm_put(gt);
}