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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-03-03 19:33:12 +0200 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-03-09 22:11:36 +0200 |
commit | 62153bdd66f281fcd2318401684a7267d8ecddd9 (patch) | |
tree | 8f510e2d989ad7e49951671f482643062ffd0fb1 /drivers/gpu/drm/i915/i915_reg.h | |
parent | drm/i915: Refactor LUT read functions (diff) | |
download | linux-dev-62153bdd66f281fcd2318401684a7267d8ecddd9.tar.xz linux-dev-62153bdd66f281fcd2318401684a7267d8ecddd9.zip |
drm/i915: Fix readout of PIPEGCMAX
PIPEGCMAX is a 11.6 (or 1.16 if you will) value. Ie. it can
represent a value of 1.0 when the maximum we can store in the
software LUT is 0.ffff. Clamp the value so that it gets
saturated to the max the uapi supports.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200303173313.28117-9-ville.syrjala@linux.intel.com
Reviewed-by: Swati Sharma <swati2.sharma@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 80cf02a6eec1..79ae9654dac9 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5870,7 +5870,6 @@ enum { #define _PIPEAGCMAX 0x70010 #define _PIPEBGCMAX 0x71010 -#define PIPEGCMAX_RGB_MASK REG_GENMASK(15, 0) #define PIPEGCMAX(pipe, i) _MMIO_PIPE2(pipe, _PIPEAGCMAX + (i) * 4) #define _PIPE_MISC_A 0x70030 |