diff options
| author |   Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2019-09-24 13:01:52 +0530 |
|---|---|---|
| committer |   Lucas De Marchi <lucas.demarchi@intel.com> | 2019-09-24 10:56:28 -0700 |
| commit | 6ea3cee6d77d2c5513d5a61162b209f671fb3bb8 (patch) | |
| tree | 715a70418eed9a7ce3cf32f6789824d62a68c981 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915/selftests: Verify the LRC register layout between init and HW (diff) | |
| download | linux-dev-6ea3cee6d77d2c5513d5a61162b209f671fb3bb8.tar.xz linux-dev-6ea3cee6d77d2c5513d5a61162b209f671fb3bb8.zip | |
drm/i915: Add Pipe D cursor ctrl register for Gen12
Currently the offset for PIPE D cursor control register is missing in
i915_reg.h due to which the cursor plane cannot be enabled for Pipe D.
This also causes kernel Warning, when a user requests to enable cursor
plane for PIPE D for Gen 12 platforms.
This patch adds the CURSOR_CTL_D register in the i915_reg.h.
v2: Rebase
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111640
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
[Lucas: remove extra blank line]
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1569310312-12313-1-git-send-email-ankit.k.nautiyal@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a69c19aae5bb..28c483a3bbba 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6240,6 +6240,7 @@ enum { #define CHV_CURSOR_C_OFFSET 0x700e0 #define IVB_CURSOR_B_OFFSET 0x71080 #define IVB_CURSOR_C_OFFSET 0x72080 +#define TGL_CURSOR_D_OFFSET 0x73080 /* Display A control */ #define _DSPACNTR 0x70180 |