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| author |   Ramalingam C <ramalingam.c@intel.com> | 2022-01-29 00:22:05 +0530 |
|---|---|---|
| committer | Ramalingam C <ramalingam.c@intel.com> | 2022-02-11 17:11:06 +0530 |
| commit | 88d23eda3c7f8bb560ae93b00d03688ff7920cdd (patch) | |
| tree | 01ad274d62873c5dfc6e7b8708feabb075ab1e73 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915/ttm: tweak priority hint selection (diff) | |
| download | linux-dev-88d23eda3c7f8bb560ae93b00d03688ff7920cdd.tar.xz linux-dev-88d23eda3c7f8bb560ae93b00d03688ff7920cdd.zip | |
drm/i915/dg2: Add Wa_22011450934
An indirect ctx wabb is implemented as per Wa_22011450934 to avoid rcs
restore hang during context restore of a preempted context in GPGPU mode
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
cc: Chris Wilson <chris.p.wilson@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220128185209.18077-2-ramalingam.c@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a19504ac86b1..f95bbb10b6f4 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -13024,4 +13024,8 @@ enum skl_power_gate { #define SLICE_COMMON_ECO_CHICKEN1 _MMIO(0x731C) #define MSC_MSAA_REODER_BUF_BYPASS_DISABLE REG_BIT(14) +#define GEN12_CULLBIT1 _MMIO(0x6100) +#define GEN12_CULLBIT2 _MMIO(0x7030) +#define GEN12_STATE_ACK_DEBUG _MMIO(0x20BC) + #endif /* _I915_REG_H_ */ |