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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-06-23 16:08:54 +0300 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-06-27 19:05:47 +0300 |
commit | c92df6aa397b5a37cf06004a219b4fdf26234dd6 (patch) | |
tree | 9628c0bc150c4f811678b9d8e29eaee0cfc4d6b3 /drivers/gpu/drm/i915/i915_reg.h | |
parent | drm/i915: Move pipe_offsets[] & co. to INTEL_INFO->display (diff) | |
download | linux-dev-c92df6aa397b5a37cf06004a219b4fdf26234dd6.tar.xz linux-dev-c92df6aa397b5a37cf06004a219b4fdf26234dd6.zip |
drm/i915: Move display_mmio_offset under INTEL_INFO->display
The display register offsets are display stuff so stick
into the display portion of the device info.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220623130900.26078-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index e59d0b0123c9..76c47f699e70 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -115,7 +115,7 @@ * #define GEN8_BAR _MMIO(0xb888) */ -#define DISPLAY_MMIO_BASE(dev_priv) (INTEL_INFO(dev_priv)->display_mmio_offset) +#define DISPLAY_MMIO_BASE(dev_priv) (INTEL_INFO(dev_priv)->display.mmio_offset) /* * Given the first two numbers __a and __b of arbitrarily many evenly spaced |