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| author |   Paulo Zanoni <paulo.r.zanoni@intel.com> | 2018-07-24 17:28:12 -0700 |
|---|---|---|
| committer | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2018-07-25 13:41:42 -0700 |
| commit | 340a44bef2342b0ff7334017e9e821645fa8ae43 (patch) | |
| tree | d58ca1fd131a5e1b0389dbd834d76afe5a9d28ba /drivers/gpu/drm/i915/intel_ddi.c | |
| parent | drm/i915/icl: Update FIA supported lane count for hpd. (diff) | |
| download | linux-dev-340a44bef2342b0ff7334017e9e821645fa8ae43.tar.xz linux-dev-340a44bef2342b0ff7334017e9e821645fa8ae43.zip | |
drm/i915/icl: program MG_DP_MODE
Programming this register is part of the Enable Sequence for
DisplayPort on ICL. Do as the spec says.
v2: Simple rebase.
Cc: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> (v1)
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180725002813.6938-5-paulo.r.zanoni@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ddi.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ddi.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 01c07a000464..399c438bd210 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2809,6 +2809,8 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, intel_display_power_get(dev_priv, dig_port->ddi_io_power_domain); + icl_program_mg_dp_mode(intel_dp); + if (IS_ICELAKE(dev_priv)) icl_ddi_vswing_sequence(encoder, crtc_state->port_clock, level, encoder->type); |