diff options
| author |   Imre Deak <imre.deak@intel.com> | 2019-04-25 21:52:53 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2019-05-02 17:15:09 +0300 |
| commit | cfda08cdac3401db03849a62206b539bb4e4632e (patch) | |
| tree | 5867b42d8ceb17cba66062c5a50408c3c26b4a1f /drivers/gpu/drm/i915/intel_ddi.c | |
| parent | drm/i915/icl: Factor out combo PHY lane power setup helper (diff) | |
| download | linux-dev-cfda08cdac3401db03849a62206b539bb4e4632e.tar.xz linux-dev-cfda08cdac3401db03849a62206b539bb4e4632e.zip | |
drm/i915/icl: Add missing combo PHY lane power setup
This step of the BSpec combo PHY port enabling is missing, so add it
now.
v2:
- Rebased on the new fixed v2 version of the helper.
v3:
- Use intel_ instead of icl_ prefix. (Jani)
Reported-by: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Madhav Chauhan <madhav.chauhan@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190425185253.3197-2-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ddi.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ddi.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 46473f102531..f5f58f6bc7e2 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -29,6 +29,7 @@ #include "i915_drv.h" #include "intel_audio.h" +#include "intel_combo_phy.h" #include "intel_connector.h" #include "intel_ddi.h" #include "intel_dp.h" @@ -3115,6 +3116,15 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, else intel_prepare_dp_ddi_buffers(encoder, crtc_state); + if (intel_port_is_combophy(dev_priv, port)) { + bool lane_reversal = + dig_port->saved_port_bits & DDI_BUF_PORT_REVERSAL; + + intel_combo_phy_power_up_lanes(dev_priv, port, false, + crtc_state->lane_count, + lane_reversal); + } + intel_ddi_init_dp_buf_reg(encoder); if (!is_mst) intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); |