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| author |   Chris Wilson <chris@chris-wilson.co.uk> | 2017-09-06 16:28:59 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2017-09-06 17:36:30 +0100 |
| commit | 90cad095eeaa43711d60066096cddaf0d3b58bf6 (patch) | |
| tree | 4c368d32140891a2bc8132a08a2fb1f374bf4b5d /drivers/gpu/drm/i915/intel_device_info.c | |
| parent | drm/i915: Re-enable GTT following a device reset (diff) | |
| download | linux-dev-90cad095eeaa43711d60066096cddaf0d3b58bf6.tar.xz linux-dev-90cad095eeaa43711d60066096cddaf0d3b58bf6.zip | |
drm/i915: Disable MI_STORE_DATA_IMM for i915g/i915gm
The early gen3 machines (i915g/Grantsdale and i915gm/Alviso) share a lot
of characteristics in their MI/GTT blocks with gen2, and in particular
can only use physical addresses in MI_STORE_DATA_IMM. This makes it
incompatible with our usage, so include those two machines in the
blacklist to prevent usage.
v2: Make it easy for gcc and rewrite it as a switch to save some space.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20170906152859.5304-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_device_info.c')
0 files changed, 0 insertions, 0 deletions