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authorDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>2019-06-06 15:42:24 -0700
committerChris Wilson <chris@chris-wilson.co.uk>2019-06-09 11:21:33 +0100
commit33ec6c9eb35e6bcf60b5a134d8e8e1ed836a0bc1 (patch)
tree45bee7402d3af6ab7406d1acdbecaa3377229038 /drivers/gpu/drm/i915/intel_device_info.h
parentdrm/i915/dsi: Read back pclk set by GOP and use that as pclk (v3) (diff)
downloadlinux-dev-33ec6c9eb35e6bcf60b5a134d8e8e1ed836a0bc1.tar.xz
linux-dev-33ec6c9eb35e6bcf60b5a134d8e8e1ed836a0bc1.zip
drm/i915/guc: always use Command Transport Buffers
Now that we've moved the Gen9 GuC blobs to version 32 we have CTB support on all gens, so no need to restrict the usage to Gen11+. Note that MMIO communication is still required for CTB initialization. v2: fix commit message nits (Michal) Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190606224225.14287-1-daniele.ceraolospurio@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_device_info.h')
-rw-r--r--drivers/gpu/drm/i915/intel_device_info.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index d67dedf0cbd8..1fb8b50df7df 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -112,7 +112,6 @@ enum intel_ppgtt_type {
func(has_reset_engine); \
func(has_fpga_dbg); \
func(has_guc); \
- func(has_guc_ct); \
func(has_l3_dpf); \
func(has_llc); \
func(has_logical_ring_contexts); \