diff options
| author |   John Harrison <John.C.Harrison@Intel.com> | 2021-07-23 12:10:24 -0700 |
|---|---|---|
| committer |   Matt Roper <matthew.d.roper@intel.com> | 2021-07-24 07:16:50 -0700 |
| commit | 938c778f6a22fa1251fe48f175006404f18fb8f3 (patch) | |
| tree | 1bf97728b5316b8f9389cd1c0273d1a562ff0502 /drivers/gpu/drm/i915/intel_device_info.h | |
| parent | drm/i915/xehp: Define multicast register ranges (diff) | |
| download | linux-dev-938c778f6a22fa1251fe48f175006404f18fb8f3.tar.xz linux-dev-938c778f6a22fa1251fe48f175006404f18fb8f3.zip | |
drm/i915/xehp: Extra media engines - Part 1 (engine definitions)
Xe_HP can have a lot of extra media engines. This patch adds the basic
definitions for them.
v2:
- Re-order intel_gt_info and intel_device_info slightly to avoid
unnecessary padding now that we've increased the size of
intel_engine_mask_t. (Tvrtko)
v3:
- Drop the .hw_id assignments. (Lucas)
v4:
- Fix graphics_ver typo for VCS4 (should be 12, not 11). (Lucas)
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210723191024.1553405-1-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_device_info.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_device_info.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 4447b121c8c2..50ac43d4047f 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -172,7 +172,6 @@ struct intel_device_info { u8 media_ver; u8 media_rel; - u8 gt; /* GT number, 0 if undefined */ intel_engine_mask_t platform_engine_mask; /* Engines supported by the HW */ enum intel_platform platform; @@ -188,6 +187,8 @@ struct intel_device_info { u32 display_mmio_offset; + u8 gt; /* GT number, 0 if undefined */ + u8 pipe_mask; u8 cpu_transcoder_mask; |