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| author |   Jim Bride <jim.bride@linux.intel.com> | 2016-09-01 15:08:10 -0700 |
|---|---|---|
| committer |   Rodrigo Vivi <rodrigo.vivi@intel.com> | 2016-09-07 13:55:33 -0700 |
| commit | 9a4edadaccea5ba9b73abaff8121e68dd0ff70bc (patch) | |
| tree | 3428d063b32e7053953eef46ae9e11ebbf2d9f34 /drivers/gpu/drm/i915/intel_dpll_mgr.h | |
| parent | drm/i915: Split bxt_ddi_pll_select() (diff) | |
| download | linux-dev-9a4edadaccea5ba9b73abaff8121e68dd0ff70bc.tar.xz linux-dev-9a4edadaccea5ba9b73abaff8121e68dd0ff70bc.zip | |
drm/i915: Split skl_get_dpll()
Split out the DisplayPort and HDMI pll setup code into separate
functions and refactor the DP code does not directly depend on
crtc state, so that the code can be used for upfront link training.
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jim Bride <jim.bride@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dpll_mgr.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dpll_mgr.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h b/drivers/gpu/drm/i915/intel_dpll_mgr.h index 11a85a53ab40..cb28f8df8701 100644 --- a/drivers/gpu/drm/i915/intel_dpll_mgr.h +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h @@ -164,4 +164,8 @@ void intel_shared_dpll_init(struct drm_device *dev); bool bxt_ddi_dp_set_dpll_hw_state(int clock, struct intel_dpll_hw_state *dpll_hw_state); +/* SKL dpll related functions */ +bool skl_ddi_dp_set_dpll_hw_state(int clock, + struct intel_dpll_hw_state *dpll_hw_state); + #endif /* _INTEL_DPLL_MGR_H_ */ |