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| author |   Jim Bride <jim.bride@linux.intel.com> | 2016-09-07 15:47:34 -0700 |
|---|---|---|
| committer |   Rodrigo Vivi <rodrigo.vivi@intel.com> | 2016-09-09 14:53:18 -0700 |
| commit | f169660ed4e57a03e6f6ed07fe192dbcb7687a0d (patch) | |
| tree | c213fcc264630a605c5687c83ebd2d18875e1fb3 /drivers/gpu/drm/i915/intel_dpll_mgr.h | |
| parent | drm/i915: Flush to GTT domain all GGTT bound objects after hibernation (diff) | |
| download | linux-dev-f169660ed4e57a03e6f6ed07fe192dbcb7687a0d.tar.xz linux-dev-f169660ed4e57a03e6f6ed07fe192dbcb7687a0d.zip | |
drm/i915/dp: Add a standalone function to obtain shared dpll for HSW/BDW/SKL/BXT
Add the PLL selection code for HSW/BDW/BXT/SKL into a stand-alone function
in order to allow for the implementation of a platform neutral upfront
link training function.
v4:
* Removed dereferencing NULL pointer in case of failure (Dhinakaran Pandiyan)
v3:
* Add Hooks for all DDI platforms into this standalone function
v2:
* Change the macro to use dev_priv instead of dev (David Weinehall)
Reviewed-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jim Bride <jim.bride@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dpll_mgr.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dpll_mgr.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h b/drivers/gpu/drm/i915/intel_dpll_mgr.h index aed74084f759..f4385353bc11 100644 --- a/drivers/gpu/drm/i915/intel_dpll_mgr.h +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h @@ -168,6 +168,8 @@ bool bxt_ddi_dp_set_dpll_hw_state(int clock, /* SKL dpll related functions */ bool skl_ddi_dp_set_dpll_hw_state(int clock, struct intel_dpll_hw_state *dpll_hw_state); +struct intel_shared_dpll *skl_find_link_pll(struct drm_i915_private *dev_priv, + int clock); /* HSW dpll related functions */ |