drm/i915/dp: Program VSC Header and DB for Pixel Encoding/Colorimetry Format

Function intel_pixel_encoding_setup_vsc handles vsc header and data block
setup for pixel encoding / colorimetry format.

Setup VSC header and data block in function intel_pixel_encoding_setup_vsc
for pixel encoding / colorimetry format as per dp 1.4a spec,
section 2.2.5.7.1, table 2-119: VSC SDP Header Bytes, section 2.2.5.7.5,
table 2-120:VSC SDP Payload for DB16 through DB18.

v2:
  Minor style fix. [Maarten]
  Refer to commit ids instead of patchwork. [Maarten]

v6: Rebase

v7:
  Rebase and addressed review comments from Ville.
  Use a structure initializer instead of memset().
  Fix non-standard comment format.
  Remove a referring to specific commit.
  Add a setting of dynamic range bit to  vsc_sdp.DB17.
  Add a setting of bpc which is based on pipe_bpp.
  Remove duplicated checking of connector's ycbcr_420_allowed from
  intel_pixel_encoding_setup_vsc(). It is already checked from
  intel_dp_ycbcr420_config().
  Remove comments for VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED. It is
  already implemented on intel_dp_get_colorimetry_status().

v8:
  A missing of setting bpc to VSC setup is the pretty fatal case, it
  replaces DRM_DEBUG_KMS() to MISSING_CASE(). [Maarten]

v9: Use a changed member name of struct dp_sdp. it renamed to db from DB.

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190521121721.32010-4-gwan-gyeong.mun@intel.com

1 files changed, 2 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 270f5bb43d9b..0fbdbe559b92 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1577,6 +1577,8 @@ void intel_dp_get_m_n(struct intel_crtc *crtc,
 		      struct intel_crtc_state *pipe_config);
 void intel_dp_set_m_n(const struct intel_crtc_state *crtc_state,
 		      enum link_m_n_set m_n);
+void intel_dp_ycbcr_420_enable(struct intel_dp *intel_dp,
+			       const struct intel_crtc_state *crtc_state);
 int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n);
 bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state,
 			struct dpll *best_clock);