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| author |   Jani Nikula <jani.nikula@intel.com> | 2017-04-06 16:44:09 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2017-04-11 16:54:29 +0300 |
| commit | a079d10812a3ed84a73d152522e658fe9f76526e (patch) | |
| tree | 894bdd8cf656727ffeb30c1cecedc405b816ab73 /drivers/gpu/drm/i915/intel_drv.h | |
| parent | drm/i915: Rename intel_engine_cs.exec_id to uabi_id (diff) | |
| download | linux-dev-a079d10812a3ed84a73d152522e658fe9f76526e.tar.xz linux-dev-a079d10812a3ed84a73d152522e658fe9f76526e.zip | |
drm/i915/dp: use the sink rates array for max sink rates
Looking at DPCD DP_MAX_LINK_RATE may be completely bogus for eDP 1.4
which is allowed to use link rate select method and have 0 in max link
rate. With this change, it makes sense to store the max rate as the
actual rate rather than as a bw code.
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/3e8baadb406d59f414cab36fed9f0b35d207fde5.1491485983.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 7bc0c25b3396..92e353dc61bf 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -959,7 +959,7 @@ struct intel_dp { /* Max lane count for the sink as per DPCD registers */ uint8_t max_sink_lane_count; /* Max link BW for the sink as per DPCD registers */ - int max_sink_link_bw; + int max_sink_link_rate; /* sink or branch descriptor */ struct intel_dp_desc desc; struct drm_dp_aux aux; |