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| author |   Imre Deak <imre.deak@intel.com> | 2014-11-05 20:48:31 +0200 |
|---|---|---|
| committer |   Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-11-14 10:29:15 +0100 |
| commit | a72fbc3a14f071d75bccb07ab5148d44f0af77eb (patch) | |
| tree | 8eb63111cb569853b91723fe67df9ee8ad3a5c6b /drivers/gpu/drm/i915/intel_drv.h | |
| parent | drm/i915/chv: Add new workarounds for chv (diff) | |
| download | linux-dev-a72fbc3a14f071d75bccb07ab5148d44f0af77eb.tar.xz linux-dev-a72fbc3a14f071d75bccb07ab5148d44f0af77eb.zip | |
drm/i915: unify gen6/gen8 pm irq helpers
The helpers to enable/disable PM IRQs for GEN6 and GEN8 are the same
except for the PM interrupt mask register, so abstract away this
register in the GEN6 versions and use these everywhere.
No functional change.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 5c622ad2e9aa..d93697a41a13 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -784,8 +784,6 @@ void gen5_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); void gen5_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); void gen6_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); void gen6_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); -void gen8_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); -void gen8_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); void intel_runtime_pm_disable_interrupts(struct drm_i915_private *dev_priv); void intel_runtime_pm_enable_interrupts(struct drm_i915_private *dev_priv); static inline bool intel_irqs_enabled(struct drm_i915_private *dev_priv) |