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authorAlex Dai <yu.dai@intel.com>2015-08-18 14:32:35 -0700
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-09-02 09:54:56 +0200
commitaa557ab01576531c39fa3e7ceaa33314f65164fd (patch)
tree2b855aa4b89bb90235b37affd9889faba781adc0 /drivers/gpu/drm/i915/intel_guc_loader.c
parentdrm/i915: Fix module initialisation, v2. (diff)
downloadlinux-dev-aa557ab01576531c39fa3e7ceaa33314f65164fd.tar.xz
linux-dev-aa557ab01576531c39fa3e7ceaa33314f65164fd.zip
drm/i915/guc: Support GuC version 4.3
The firmware layout changes that now it only has css header + uCode + RSA signature. Plus, other trivial changes to support GuC V4.3. Signed-off-by: Alex Dai <yu.dai@intel.com> Reviewed-by: Dave Gordon <david.s.gordon@intel.com> Reviewed-by: Dave Gordon <david.s.gordon@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_guc_loader.c')
-rw-r--r--drivers/gpu/drm/i915/intel_guc_loader.c17
1 files changed, 6 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index 13e75f6b1100..5eafd31fb4a6 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -59,7 +59,7 @@
*
*/
-#define I915_SKL_GUC_UCODE "i915/skl_guc_ver3.bin"
+#define I915_SKL_GUC_UCODE "i915/skl_guc_ver4.bin"
MODULE_FIRMWARE(I915_SKL_GUC_UCODE);
/* User-friendly representation of an enum */
@@ -226,10 +226,6 @@ static inline bool guc_ucode_response(struct drm_i915_private *dev_priv,
* +-------------------------------+ ----
* | RSA signature | 256B
* +-------------------------------+ ----
- * | RSA public Key | 256B
- * +-------------------------------+ ----
- * | Public key modulus | 4B
- * +-------------------------------+ ----
*
* Architecturally, the DMA engine is bidirectional, and can potentially even
* transfer between GTT locations. This functionality is left out of the API
@@ -244,7 +240,6 @@ static inline bool guc_ucode_response(struct drm_i915_private *dev_priv,
#define UOS_VER_MAJOR_OFFSET 0x46
#define UOS_CSS_HEADER_SIZE 0x80
#define UOS_RSA_SIG_SIZE 0x100
-#define UOS_CSS_SIGNING_SIZE 0x204
static int guc_ucode_xfer_dma(struct drm_i915_private *dev_priv)
{
@@ -256,7 +251,7 @@ static int guc_ucode_xfer_dma(struct drm_i915_private *dev_priv)
int i, ret = 0;
/* uCode size, also is where RSA signature starts */
- offset = ucode_size = guc_fw->guc_fw_size - UOS_CSS_SIGNING_SIZE;
+ offset = ucode_size = guc_fw->guc_fw_size - UOS_RSA_SIG_SIZE;
I915_WRITE(DMA_COPY_SIZE, ucode_size);
/* Copy RSA signature from the fw image to HW for verification */
@@ -463,8 +458,8 @@ static void guc_fw_fetch(struct drm_device *dev, struct intel_guc_fw *guc_fw)
struct drm_i915_gem_object *obj;
const struct firmware *fw;
const u8 *css_header;
- const size_t minsize = UOS_CSS_HEADER_SIZE + UOS_CSS_SIGNING_SIZE;
- const size_t maxsize = GUC_WOPCM_SIZE_VALUE + UOS_CSS_SIGNING_SIZE
+ const size_t minsize = UOS_CSS_HEADER_SIZE + UOS_RSA_SIG_SIZE;
+ const size_t maxsize = GUC_WOPCM_SIZE_VALUE + UOS_RSA_SIG_SIZE
- 0x8000; /* 32k reserved (8K stack + 24k context) */
int err;
@@ -564,8 +559,8 @@ void intel_guc_ucode_init(struct drm_device *dev)
fw_path = NULL;
} else if (IS_SKYLAKE(dev)) {
fw_path = I915_SKL_GUC_UCODE;
- guc_fw->guc_fw_major_wanted = 3;
- guc_fw->guc_fw_minor_wanted = 0;
+ guc_fw->guc_fw_major_wanted = 4;
+ guc_fw->guc_fw_minor_wanted = 3;
} else {
i915.enable_guc_submission = false;
fw_path = ""; /* unknown device */