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authorTim Gore <tim.gore@intel.com>2015-10-26 10:48:58 +0000
committerJani Nikula <jani.nikula@intel.com>2015-10-29 15:39:15 +0200
commitcbdc12a9fc9d273a648e94eeee6794646f0158f2 (patch)
tree5a10cfb14f6fab5fc32dc40b5efb0bad93c6f488 /drivers/gpu/drm/i915/intel_guc_loader.c
parentdrm/i915/kbl: Add Kabylake GT4 PCI ID (diff)
downloadlinux-dev-cbdc12a9fc9d273a648e94eeee6794646f0158f2.tar.xz
linux-dev-cbdc12a9fc9d273a648e94eeee6794646f0158f2.zip
drm/i915: make A0 wa's applied to A1
Since A1 chips use the same GPU as A0, they need all the same wa's in the i915 driver. Update some conditionals to do this. Signed-off-by: Tim Gore <tim.gore@intel.com> Reviewed-by: Arun Siluvery <arun.siluvery@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1445856538-5417-1-git-send-email-tim.gore@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_guc_loader.c')
-rw-r--r--drivers/gpu/drm/i915/intel_guc_loader.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index c0281df52702..6ec7b2398200 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -309,7 +309,7 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
/* WaDisableMinuteIaClockGating:skl,bxt */
if (IS_SKL_REVID(dev, 0, SKL_REVID_B0) ||
- IS_BXT_REVID(dev, 0, BXT_REVID_A0)) {
+ IS_BXT_REVID(dev, 0, BXT_REVID_A1)) {
I915_WRITE(GUC_SHIM_CONTROL, (I915_READ(GUC_SHIM_CONTROL) &
~GUC_ENABLE_MIA_CLOCK_GATING));
}