diff options
| author |   Lyude Paul <lyude@redhat.com> | 2021-02-09 14:13:05 -0500 |
|---|---|---|
| committer | Lyude Paul <lyude@redhat.com> | 2021-02-11 18:19:29 -0500 |
| commit | 4b97039e90bf895a7a1db47411079f0cffe395f6 (patch) | |
| tree | f15e279e97ab0fba32ba8716aee6913a58679bd3 /drivers/gpu/drm/i915/intel_pch.c | |
| parent | drm/i915/display: Handle lane polarity for DDI port (diff) | |
| download | linux-dev-4b97039e90bf895a7a1db47411079f0cffe395f6.tar.xz linux-dev-4b97039e90bf895a7a1db47411079f0cffe395f6.zip | |
drm/i915/gen9_bc: Recognize TGP PCH + CML combos
Since Intel has introduced the gen9_bc platform, a combination of
Tigerpoint PCHs and CML CPUs, let's recognize such platforms as valid and
avoid WARNing on them.
Changes since v4:
* Split this into it's own patch - vsyrjala
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
[originally from Tejas's work]
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210209212832.1401815-2-lyude@redhat.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pch.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pch.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c index 4813207fc053..7476f0e063c6 100644 --- a/drivers/gpu/drm/i915/intel_pch.c +++ b/drivers/gpu/drm/i915/intel_pch.c @@ -121,7 +121,8 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) case INTEL_PCH_TGP2_DEVICE_ID_TYPE: drm_dbg_kms(&dev_priv->drm, "Found Tiger Lake LP PCH\n"); drm_WARN_ON(&dev_priv->drm, !IS_TIGERLAKE(dev_priv) && - !IS_ROCKETLAKE(dev_priv)); + !IS_ROCKETLAKE(dev_priv) && + !IS_GEN9_BC(dev_priv)); return PCH_TGP; case INTEL_PCH_JSP_DEVICE_ID_TYPE: case INTEL_PCH_JSP2_DEVICE_ID_TYPE: |