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authorLucas De Marchi <lucas.demarchi@intel.com>2020-07-13 11:23:21 -0700
committerLucas De Marchi <lucas.demarchi@intel.com>2020-07-14 02:47:21 -0700
commit51e3a64fafd534dfe1da1c53dc6917a51f0ba75c (patch)
tree74c9777b0667cc27a22b7c15563aeb47bc10de53 /drivers/gpu/drm/i915/intel_pch.c
parentdrm/i915/dg1: Remove SHPD_FILTER_CNT register programming (diff)
downloadlinux-dev-51e3a64fafd534dfe1da1c53dc6917a51f0ba75c.tar.xz
linux-dev-51e3a64fafd534dfe1da1c53dc6917a51f0ba75c.zip
drm/i915/dg1: Add fake PCH
DG1 has the south engine display on the same PCI device. Ideally we could use HAS_PCH_SPLIT(), but that macro is misused all across the code base to rather signify a range of gens. So add a fake one for DG1 to be used where needed. Cc: Aditya Swarup <aditya.swarup@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200713182321.12390-6-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pch.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pch.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c
index c668e99eb2e4..6c97192e9ca8 100644
--- a/drivers/gpu/drm/i915/intel_pch.c
+++ b/drivers/gpu/drm/i915/intel_pch.c
@@ -188,6 +188,12 @@ void intel_detect_pch(struct drm_i915_private *dev_priv)
{
struct pci_dev *pch = NULL;
+ /* DG1 has south engine display on the same PCI device */
+ if (IS_DG1(dev_priv)) {
+ dev_priv->pch_type = PCH_DG1;
+ return;
+ }
+
/*
* The reason to probe ISA bridge instead of Dev31:Fun0 is to
* make graphics device passthrough work easy for VMM, that only